Improving Multi-core Processor Energy Efficiency and Lifetime by Embracing Variability and Wearout

Negative Bias Temperature Instability (NBTI) is a reliability challenge due to circuit degradation, which has only received attention after its appearance in the last decade. The problem leads to an increase in the threshold voltage and a decrease in the drive current of p-channel transistors when they are stressed over extended periods of time. In this paper, we use an advanced model for estimating NBTI degradation in order to minimize its impact on a multi-core processor’s lifespan through automatic workload management and consequently save power at the same time. We show that our approach saves approximately 9.25% power and increases life expectancy by 3 years while avoiding any negative performance impact. Index Terms — degradation, delay, dynamic voltage and frequency scaling (DVFS), multi-core processor, negative bias temperature instability (NBTI), reaction-diffusion (R-D) model, threshold voltage